Degradation of Metal Induced Laterally Crystallized n-Type Polysilicon TFTs under Dynamic Gate Voltage Stresses
Degradation behaviors of metal induced laterally crystallized n-type polysilicon TFTs under dynamic gate voltage stresses have been investigated. Device degradation occurs when the base voltage of gate pulses is lower than the flat-band voltage,and more degradation occurs with steeper falling edge and larger amplitude of the gate pulses. Device degradation is attributed to the hot carrier mechanism related to the transient voltage transition at the falling edge of the gate stress pulses.
Huaisheng Wang Mingxiang Wang Man Wong
Dept.of Microelectronics,Soochow University,Suzhou 215025,P.R.China Dept.Electrical Engineering,Nanj Dept.of Microelectronics,Soochow University,Suzhou 215025,P.R.China Dept.of Electronic and Computer Engineering,the Hong Kong University of Science and Technology,Hong
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
640-643
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)