Fabrication and Characteristics of Germanium-On-Insulator Substrates
The fabrication of Germanium-On-Insulator (GeOI) by wafer bonding and ion-cut approach was investigated. With cyclic HF/DIW cleaning and N2 plasma surface activation,large-area layer transfer of GeOI substrates was realized by ion-cut processes with bulk Ge wafer as the donor wafer. The GeOI substrates are thermally stable up to 550℃ annealing and surface roughness can be smoothed down to 0.3 nm RMS by Chemical Mechanical Planarization (CMP). After surface polishing,Epi-Ge on Si wafer can also be used as the donor wafer to realize layer transfer. Four-probe configuration Pseudo-MOSFET was employed to characterize the electrical properties of the transferred Ge and the Ge/SiO2 bonding interface. At Ge/SiO2 interface,GeOI substrates show both accumulation and inversion conduction modes. High-temperature forming gas annealing in the vicinity of 500℃600℃ has shown the best carrier mobilities,with the interface trap density and interface fixed charge density as low as 1010q/cm2. The extracted bulk hole mobility of the annealed GeOI is near 500cm2/V-s,which is higher than that of silicon (300cm2/V-s) at the same doping concentration level.
Hai-Yan Jin Eric Z.Liu Nathan W.Cheung
Department of Electrical Engineering and Computer Sciences,University of California,Berkeley,CA 94720,USA
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
662-668
2008-10-20（万方平台首次上网日期，不代表论文的发表时间）