Embedded Erase Failure in NOR Flash EEPROM Memory

摘要：

This paper presents the evaluation methods and findings of the hot temperature embedded erase failure on an embedded NOR flash EEPROM device. Automated Test Equipment (ATE) and bench evaluation revealed that the embedded erase failure was caused by compaction failure with high compaction pulse counts. Failure localization using memory bitmapping showed that the fail bitcells were populated at the edge of the flash array. Based on detailed electrical characterization and physical analysis,compaction failure was determined to be due to poor hot carrier injection (HCI) efficiency as a result of possible shallow trench isolation (STI) over-polish.

作者: Bryan Lim Vivien Wong L.C.Gooi Cecilia Lee Caroline Francis K.Y.Lee

作者单位: Freescale Semiconductor,2,Jalan SS 8/2,Free Industrial Zone Sungei Way,47300 Petaling Jaya,Selangor,Malaysia

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 843-845

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）