Analysis of Contact Resistance Effect to SRAM Performance in Deep Sub-Micron technology

摘要：

SRAM,the important memory component,has been widely used in design of digital and communication circuits. SRAM is also an effective vehicle for process development and qualification due to its complexity and high density in which an engineer is able to detect the process issues. Generally SRAMs yield is used as an indicator of the semiconductor nodes yield. In this paper we present the analysis of SRAM Static Noise Margin (SNM) and its influence by contact resistance for a 6T SRAM bit cell. We also compare SNM for each generation of the process nodes from 0.25um,0.18um,and 0.15um,0.13um,to 0.09um. We conclude that the contact resistance,alone with other process parameters,determines the SNM performance.

作者: Stella.Huang Waisum.Wong

作者单位: LTD Device,Semiconductor Manufacturing International Corp .Shanghai 201203,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 873-875

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）