A Novel Circuit Scheme and Analysis for Three-Level FeRAM
This paper proposes a novel circuit architecture and its operation style for three-level ferroelectric random access memory (FeRAM) which can improve storage density by 1.5 times compared to traditional 1T1C FeRAM under same technology. A new reference voltage generation scheme is adopted to enhance the reliability of this proposed circuit architecture. Based on the results of simulation,the function and reliability of three-level FeRAM have been analyzed and verified.
Hao Wu Ze Jia Tian-ling Ren
Institute of Microelectronics,Tsinghua National Laboratory for Information Science and Technology Tsinghua University,Beijing 100084,P.R.China
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
880-883
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)