Characteristics of sub-l00nm Ferroelectric Field Effect Transistor with High-k Buffer Layer

摘要：

The simulation work is carried out using two dimension device simulator to investigate the characteristics of sub-lOOnm ferroelectric field effect transistor (FeFET) with high-k material as the buffer layer. Different configurations of gate stack are simulated and analyzed. It is shown that the structure of double-layer buffer can improve the device performance efficiently. Some important issues for FeFET scaling down are also discussed in this paper.

作者: Rui Jin Yuncheng Song Min Ji Honghua Xu Jinfeng Kang Ruqi Han Xiaoyan Liu

作者单位: Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking Universi Key Laboratory of Microelectronic Devices and Circuits,Institute of icroelectronics,Peking Universit

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 888-891

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）