会议专题

A 45nm Low Power Bulk Technology Featuring Carbon Co-implantation and Laser Anneal on 45°-rotated Substrate

This paper presents a cost-effective low power 45nm bulk technology platform,primarily designed to serve the wireless multimedia and consumer electronics need. This technology platform features carbon co-IIP in the nMOS halo,laser annealing scheme,stress liner on the 45°-rotated wafer (<100>) for process simplicity to achieve high device performance and low leakage together. Drive current as high as 650/320 uA/um at Ioff of 0.5 nA/um with Vdd=1.1V has been achieved for both NMOS and PMOS respectively. Ring oscillator speed (FO=1) has been boosted up by 30% with the device optimization. SRAM Vt mismatch is also improved by 10% with carbon co-IIP with good SRAM characteristics and low leakage current in 0.299 um2 cell.

J.Yuan O.Kwon O.S.Kwon J.Yan S.Fang W.Wille H.Wang Y.T.Chow R.Booth T.Kebede W.Clark V.Chan H.Mo C.Ryou J.Liang J.H.Yang C.W.Lai S.S.Naragad O.Gluschenkov M.R.Visokay C.Radens S.Deshpande M.Eller H.Shang Y.Li N.Cave J.Sudijono J.Ku R.Divakaruni N.Rovedo H.K.Lee Y.Gao V.Sardesai N.Kanike V.Vidya

IBM Semiconductor Research and Development Center (SRDC),Hopewell junction,NY,12533 Infineon Technologies AG Chartered Semiconductor Manufacturing Limited Samsung Elec.Co.Ltd Chartered Semiconductor anufacturing Limited IBM Semiconductor Research and Development Center (SRDC),Hopewell unction,NY,12533 Freescale Co.Ltd

国际会议

9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

北京

英文

1130-1133

2008-10-20(万方平台首次上网日期,不代表论文的发表时间)