New Three-Dimensional Integration Technology Using Reconfigured Wafers

摘要：

We have proposed a new three-dimensional (3D) integration technology based on reconfigured waferon-wafer bonding technique to solve several problems in 3D integration technology using the conventional wafer-on-wafer bonding technique. 3D LSIs are fabricated by bonding the reconfigured wafers onto the supporting Si wafer. The reconfigured wafer consists of many known good dies (KGDs) which are arrayed and glued on a holding Si wafer with Si steps by chip self-assembly technique. Therefore,the yield of the reconfigured wafer can be 100 %. As a result,we can obtain a high production yield even after bonding many wafers. In addition,it is not necessary in the reconfigured wafer that the chip size has to be identical within the wafer. Therefore,we can stack various kinds of chips with different chip sizes,different materials and different devices in our new 3D integration technology based on the configured-wafer-on-wafer bonding technique (Reconfig. W-on-W 3D technology).

作者: Mitsumasa Koyanagi Takafumi Fukushima Tetsu Tanaka

作者单位: Department of Bioengineering and Robotics,Tohoku University 6-6-01 Aza-Aoba,Aramaki,Aoba-ku,Sendai 980-8579,Japan

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1188-1191

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）