Investigation and Reduction of Metal Voids post-CMP in Dual Damascene Process

摘要：

Copper void density post copper CMP and defect reduction methods were investigated on 300mm wafers of 65nm node in this work. Effects of copper seed thickness,post-plating anneal temperature,FAB ambient and FOUP cleanliness on metal voids were examined. It was found that thinner seed thickness,lower anneal temperature with longer time post plating,high temperature de-gas or water rinse before copper plating,N2 purge and special FOUP all resulted in reduced metal line void density.

关键词： Metal voids copper dual damascene seed thickness anneal temperature VOC

作者: Jiaxiang Nie Yun Kang Ruipeng Yang Na Su Weiye He Sheng Liu Xiangtao Kong

作者单位: Semiconductor Manufacturing International Corporation,Shanghai,201203,China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1223-1226

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）