A Complez BPF with On Chip Auto-tuning Architecture for Low-IF Receivers
A 3rd order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18μm standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3rd order harmonic input intercept point (IIP3) is larger than 19dBm,with 50Ω as the source impedance. The input referred noise is about 80μ.Vrms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28×0.22mm2,less than 1/8 of that of the main-filter which is 0.92×0.59mm2. After tuning is completed,the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.
complez filter BPF auto-tuning CMOS
Fangxiong Chen Min Lin Hailong Jia Yin Shi
Institute of Semiconductors,Chinese Academy of Science,Beijing 100083,P.R.China Suzhou-CAS Semiconductors Integrated Technology Research Center,Suzhou 215021,P.R.China
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
1665-1668
2008-10-20（万方平台首次上网日期，不代表论文的发表时间）