A New Delay Line Structure for Switched Capacitor (SC) Circuits
A new delay line structure is proposed in this paper. The proposed delay line does not produce cumulative errors as a signal is transmitted along a conventional delay line. The application of the proposed delay line to the circuit design of FIR and IIR filter is described,and the simulation results of an IIR filter are presented.
Huan Qun ZHENG Yong Ching LIM Yong Ping XU
Department of ECE,Faculty of Engineering,National University of Singapore,Singapore 117576 School of EEE,Nanyang Technological University,Singapore 639798
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
1741-1744
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)