A New Bandwidth Enhancement Technique for Cascode Amplifier

摘要：

In this paper,a new technique is presented to increase the bandwidth for a single stage amplifier. Usually,-3 dB bandwidth of single stage amplifier is in few MHz High output impedance and subsequent capacitive loading decrease the bandwidth of amplifier. The presented technique uses a load which itself acts as bandwidth enhancer. This high speed amplifier is designed on 180 nm CMOS technology,operates at 2.5 V power supply. This amplifier is succeeded by an output buffer to achieve a better linearity,high output swing and required output impedance for matching.

作者: Sameer Somvanshi

作者单位: BITS Pilani,India

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1803-1806

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）