Design and Performance Analysis of One 32-bit Dual Issue RISC Processor for Embedded Application

摘要：

One 32-bit RISC processor for embedded application is presented. With respect to the limitation of power and area in the embedded system,the RISC processor is deliberately designed. Dual-issue technology is adopted to improve the performance; the complex logic of the dynamic scheduling algorithm is allocated into different pipeline stage to improve the frequency. Lower power design method is used to decrease the whole power. The processor is implemented by SMIC 0.18um CMOS technology. It contains almost 5 million transistors; the core frequency is 266 MHz and the power is about 1.3w under it The embedded VxWorks OS can run on it stably. The performance analysis of the RISC processor is also provided. According to the embedded benchmark program,the average IPC of the RISC processor is nearly 1.5.

作者: Xiaoping Huang Xiaoya Fan Shengbing Zhang

作者单位: Computer Academy,Northwestern Polytechnical University,Xian,710072,China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1827-1830

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）