Design and Analysis of On-Chip Router
Network-on-chip (NoC),one of the most promising interconnection schemes for complex SoC design,presents large design space. Because the influence of different parameters on the performance of the NoC varies significantly,it is desirable to analyze and understand specific effect of these parameters on the overall performance in order to provide NoC designers guidelines to optimize their plans. In this paper,we mainly focus on the router design parameters on both system level including traffic pattern,network topology and routing algorithm,and architecture level including arbitration algorithm and buffer mechanism. At last,we analyze the resource consumption of the router and propose possible approaches to reduce the cost.
Cheng Liu Liyi Xiao Fangfa Fu
Micro-Electronics Center, Harbin Institute of Technology,Harbin 150001,P.R.China
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
1835-1838
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)