会议专题

Optimization of ezplicit-pulsed flip-flops for high performance

Two novel structures for explicit-pulsed flip-flops are proposed in this paper. The charging and discharging time are greatly reduced due to the lower capacitive load of interval nodes in the new structures,and the short circuit power consumption is diminished by overcoming the race problem as well. Simulation results also indicate the new structures are ideal for high-speed and low-power digital design.

Xiaoyang Zhang Song Jia Yuan Wang Ganggang Zhang

Key Laboratory of Microelectronic Devices and Circuits,Institute of Microelectronics,Peking University,100871

国际会议

9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

北京

英文

1885-1888

2008-10-20(万方平台首次上网日期,不代表论文的发表时间)