A VLSI Structural Optimization Method and Workflow Based on Synthesis Frequency Inflezion

摘要：

A synthesis frequency inflexion phenomenon of VLSI synthesis process is discussed,and then a VLSI structural optimization method with its workflow based on the analysis of synthesis frequency infrexion and register insertion is proposed. Registers are usually used for sequential synchronization and increasing maximum operating frequency,but in this issue,they are utilized to avoid excessively high combinational logic expenditure. In the H.264 macroblock-level SAD tree case,50.6% improvement in speed is achieved at the expense of 2.9% increment in area. This method contains no complex algorithm,but exhibits good operability and generality. It is very suitable and useful for complicated VLSI structural design and/or their critical path optimization.

作者: Chungan Peng Ying Li Xiaoxin Cui Xixin Cao Dunshan Yu

作者单位: Soc lab.,Institute of Microelectronics,Peking University,Beijing 100871,P.R.China Institute of Beiji Soc lab.,Institute of Microelectronics,Peking University,Beijing 100871,P.R.China School of Software and Microelectronics,Peking University,Beijing,102600,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1897-1900

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）