A Reconfigurable ΣΔ Modulator for Multi-Standard Wireless Application
This paper describes the design and implementation of a reconfigurable low power 180-nm CMOS cascade sigma-delta modulator for multi-standard wireless communication. Both architectural and circuital reconfiguration is used to adapt its performance to multi-standard applications. Post layout simulation reveals that the prototype achieves 86.82/54.88/66.51dB peak signal-to-(noise+distortion) ratio within bandwidth of 200kHz/2MHz/4MHz respectively for GSM/RFID (UHF)AVCDMA standards under power consumption of 7.6/11.1/13.3mWin 1.8Vsupply.
Lu Chai Xi Tan Hao Min
Institute of Microelectronics,Fudan University,Shanghai 201203,P.R.China
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
1917-1920
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)