A novel calibration technique applying to an adaptive-bandwidth PLL

摘要：

This paper proposes a novel calibration technique and its application on an adaptive-bandwidth PLL. The new calibration method reduces calibration time by using an improved dual-edge phase detector to compare frequency difference directly. The maximum calibration time is less than five comparison periods. With the calibration technique and an adaptive bandwidth,the PLL can maintain optimal performance during the whole working range. The proposed circuit has been implemented in 0.18um CMOS logic process. Results show that the calibration time is less than 1.2μs,and the total locking time is less than 3ms. The PLL has good jitter performance within its operating range from 860MHz to 2.1GHz.

关键词： PLL calibration low jitter

作者: Song Ying Wang Yuan Jia Song Zhao Baoying

作者单位: Key Laboratory of Microelectronic Devices and Circuits.Institute of Microelectronics,Peking University,100871

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 1933-1936

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）