FPGA Interconnect Testing Algorithm Based on Routing-Resource Graph

摘要：

Static-random-access-memory (SRAM)-based field programmable gate arrays (FPGAs) consists of 50%-70% routing resources. A simple programmable interconnect point (PIP) is a switch controlled by SRAM configuration cell connecting two wires. A novel traverse algorithm targeted for the detection of PIP open faults is proposed. Experimental results run on the Fudan Design System (FDS) platform show that the algorithm is effective to examine the open faults of the routing paths caused by the PIPs fault configuration.

作者: Li Dai Zhi-bin Lin Shao-chi Liang Meng Yang Ling-li Wang

作者单位: State Key Lab of ASIC & Systems,Fudan University,Shanghai 201203,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2087-2090

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）