A BIST scheme for full characterization of ADC parameters in Mized-Signal SoCs

摘要：

A BIST scheme that can both characterize the dynamic and static parameters of ADCs in Mixed-Signal SoCs are proposed in this paper. This approach can be implemented almost all digitally except for a few simple analog filters. Analog stimulus for both the dynamic and static test are encoded and stored in on-chip RAM or ROM and retrieved when the corresponding test starts. Elemental operative units and memories for response analysis can be reused to reduce hardware consumption. The proposed scheme unifies the stimulus generation mechanism and reuses the resource for response analysis thus can be implemented with reasonable area overhead.

作者: Chao Yuan Yuanfu Zhao Jun Du

作者单位: Beijing Microelectronics Technology Institute,P.O.Box 9243,Beijing,100076,China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2095-2098

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）