A High Precision Ramp Generator for Low Cost ADC Test

摘要：

In this paper,we have proposed a new high precision ramp waveform generator for low cost ADC test. With proposed test method combined with histogram analysis,an ADC can be easily tested on general digital testers. In our approach,we combine a traditional ramp generator with proper gain of operational amplifier (OPA) for ADC test This new ramp generator structure can reduce the effect of output resistance (Ro) and then get the smaller integral nonlinearity (INL) error. Eventually,we have designed a ramp generator chip using TSMC CMOS 0.35μm 2P4M technology. The core area without I/O pad is 144μm×277μm,operation voltage is 3.3V. Experimental results show that the chip has a ramp signal of 2V full range with duration of 100μS and measured a maximum INL of 20μV only. The linearity of the ramp waveform equals to 16 bits resolution Such linearity allows the test of ADC up to 14 bits.

作者: Wen-Ta Lee Yi-Zhen Liao Jia-Chang Hsu Yuh-Shyan Hwang Jiann-Jong Chen

作者单位: Graduate Institute of Computer and Communication Engineering,National Taipei University of Technology Taipei,Taiwan,China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2103-2106

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）