A Novel H.264 QP Adaptive MPDC Block-Matching Algorithm and Its VLSI Design

摘要：

The computational complexity and hardware design of block-matching criteria were discussed,and a novel MPDC algorithm and its VLSI structure for H.264 were presented,in which a QP adaptive MPDC threshold was derived from the basics of H.264 4×4 integer transform and 52-level scalar quantization and the calculation process was adjusted for hardware optimization. When QP is greater than 18,the proposed criterion performs as well as SAD scheme,and the RDO curve error is less than 0.3 dB. Verilog HDL and SYNOPSYS DC-Shell are used for its VLSI design and implementation,and the synthesis results show that its 4×4 block-parallel structure saves 58% area and 77% power comparing with that of SADs at 200MHz. It is useful for some high-compression-ratio,low-cost and low-power video codec VLSI solutions.

作者: Chungan Peng Xixin Cao Xiaoxin Cui Dunshan Yu Shimin Sheng

作者单位: Soc lab.,Institute of Microelectronics,Peking University,Beijing 100871,P.R.China Institue of Beijin School of Software and Microelectronics,Peking University,Beijing,102600,P.R.China Soc lab.,Institute of Microelectronics,Peking University,Beijing 100871,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2148-2151

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）