Low power circuits for NoC-Based SoC Design

摘要：

In large-scale system-on-chips (SoCs),the power consumption on the communication infrastructure should be minimized for reliable,feasible,and cost-efficient implementations. An energy-efficient network-on-chip (NoC) is necessary for application to high performance SoC design. Various low-power circuits are designed,and implemented in each open system interconnection layer. Low-swing serial link and source-synchronous serial communication in physical layer and low-energy serial link coding in data-link layer are designed and realized on the NoC. Partially activated crossbar and Mux-Tree based round-robin scheduler are also designed to reduce the power consumption in network layer. Experiment on these low-power circuits demonstrate that the NoC power dissipation is reduced by 38%.

作者: Zhaohui Song Guangsheng Ma Dalei Song

作者单位: School of Computer Science and Technology,Harbin Engineering University,Harbin 150001,P.R.China Comp School of Computer Science and Technology,Harbin Engineering University,Harbin 150001,P.R.China College of Engineering,Ocean University of China,Qingdao 266001,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2180-2183

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）