会议专题

Memory-efficient Architecture Including DWT and EC for JPEG2000

In this paper,a memory-efficient and high-throughput VLSI architecture,which functionally includes Discrete Wavelet Transform (DWT) and Entropy Coder (EC),is presented for JPEG2000 implementation. The proposed architecture is made up of line-based DWT using lifting scheme combined with the EC architecture performed in a bit plane parallel coding way. Based on this,an efficient memory strategy for wavelet transform coefficients connecting DWT and EC is designed,using on-chip memory units with the same size as a code block. For an image tile with resolution 512×512 and code block size 32×32,the input sampling is up to 45M pixels/s when EC operates at 100MHz,yet the memory reduction is over 65%,compared with buffers for transform coefficients in tile size. Such features suit well applications for high-speed as well as low-memory,especially for large-tile image compression.

Jie Guo Cheng-ke Wu Yun-song Li Ke-yan Wang Juan Song

State Key Lab.of Integrated Service Networks,Xidian University,Xian 710071,P.R.China

国际会议

9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

北京

英文

2192-2195

2008-10-20(万方平台首次上网日期,不代表论文的发表时间)