High-Speed,Pipelined Implementation of Squashing Functions in Neural Networks
Neural networks are powerful tool to simulate nonlinear systems. However,obtaining reliable neural networks is usually a time-consuming task,which requires repeated training of the networks with the available data. Recently,some attempts to accelerate the neural network training by utilizing paralleled hardware have been proposed. One of the challenges in hardware acceleration is implementing the floating-point squashing functions,like sigmoid(x) and tanh(x),that have vast input domain However,previous implementations of squashing functions either suffer from low speed and poor accuracy or require large area and lots of manual works. In this paper,we present an automatic method to implement the squashing functions. Based on the proposed domain partition algorithm and coefficient compression method,squashing functions with smaller size,faster speed,and higher precision are obtained Experiment on sigmoid(x) shows that less memory usage,up to 20k times smaller error rate,300 times synthesis speedup,and 50% reduction of LUTs and flop-flops usage are achieved than conventional method.
Liangwei Ge Song Chen Takeshi Yoshimura
Graduate School of Information,Production and System,Waseda University,Kitakyushu 808-0135,Japan
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
2204-2207
2008-10-20（万方平台首次上网日期，不代表论文的发表时间）