X-Clock Tree Construction for Antenna Avoidance

摘要：

The antenna effect is a phenomenon in the plasma-based nanometer processes that many charges are accumulated on metal wires which cause the degradation of gate-oxide. It also influences the chip reliability and manufacturing yield. Different with other methods based on Manhattan-architecture for the antenna avoidance,we propose the algorithm that combines jumper insertion and layer assignment (JILA) to eliminate antenna effects on X-architecture clock tree. Experimental results on benchmarks show that our algorithm can reduce all the antenna effects effectively by requiring just extra 20.7% in total vias on average,but the penalties in clock delay,skew,and power dissipation are controlled under the increments of 0.02%,3.1%,and0.02%,respectively.

作者: Chia-Chun Tsai Feng-Tzu Hsu Chung-Chieh Kuo Jan-Ou Wu Trong-Yen Lee

作者单位: Dept.of Computer Science and Information Engineering,Nanhua University Graduate Institute of Computer and Communication,National Taipei University of Technology Department of Electronic Engineering,De Lin Institute of Technology

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2248-2251

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）