Interconnect Capacitance Characterization based on Charge Based Capacitance Measurement (CBCM) Technique for DFM Applications

摘要：

Interconnection parasitic capacitance is the dominant delay and noise source in modern integrated circuits. This paper presents a test structure and a characterization method based on charge based capacitance measurement technique. The method could be implemented to study the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction,which can in turn be used in process/device modeling for design-for-manufacturing applications.

作者: Yonghong Zhang Haixia Tang Panpan Gao Yuhua Cheng

作者单位: Shanghai Research Institute of Microelectronics (SHRIME),Peking University 608 Sheng-Xia Road,Zhang- Shanghai Research Institute of Microelectronics (SHRIME),Peking University 608 Sheng-Xia Road,Zhang-

会议类型: 国际会议

会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)

会议地点: 北京

会议语种:英文

页码: 2280-2283

在线出版日期: 2008-10-20（万方平台首次上网日期，不代表论文的发表时间）