A Novel Packing Algorithm for Sparse Crossbar FPGA Architectures
The cluster-based FPGA can significantly improve timing and routability. Packing is introduced in the CAD flow to pack logic elements into clusters. In order to reduce unnecessary connectivity within a cluster,sparse crossbar FPGA architectures are under investigation. This paper proposes a novel packing algorithm using direct graph searching method and connection gain function. Experimental results show that half populated crossbar FPGA architecture achieves 7% area improvement compared to fully populated counterpart with only 3% number of external nets overhead.
Kanwen Wang Meng Yang Lingli Wang Xuegong Zhou Jiarong Tong
State Key Lab of ASIC & System,Fudan University,Shanghai 201203,China
国际会议
9th International Conference on Solid-State and Integrated-Circuit Technology(第9届固态和集成电路国际会议)
北京
英文
2345-2348
2008-10-20(万方平台首次上网日期,不代表论文的发表时间)