会议专题

The Effect of Filling VIA-IN-PAD on Voiding Rates in PWB Assembly for BGA Components

The debate on the effect of voiding on BGA reliability has continued for years. Many PWB assemblers strive to minimize voiding, particularly with the advent of lead-free processing and in fine feature area array devices. Although solder pastes have been designed to minimize voiding and processing guidelines exist to mitigate void formation during reflow processing, the presence of a microvia in a PWB pad can contribute significantly to void formation. It is believed that the depression in the pad caused by the microvia traps air during the stencil printing process, and the air cannot fully escape during reflow. A process of filling the vias with copper at the board fabrication phase, thereby eliminating the depression that contributes to voids, was tested for its effectiveness in void mitigation during assembly. The test compares the voiding results of filled vias with those of unfilled vias and flat pads with no vias at all. The test vehicle and methods, as well as the results of the tests are presented and discussed in detail.

BGA Voiding Lead-Free Via-In-Pad Via Fill

Chrys Shea Rahul Raut Lou Picchione Quyen Chu Nicholas Tokotch Jabil Circuit Paul Wang

ALPHA-A Cookson Electronics Company Jersey City,NJ USA San Jose,CA,Saint Petersburg,FL,USA Microsoft Corporation* Mountain View,CA,USA

国际会议

第十一届世界电子电路大会

上海

英文

2008-03-17(万方平台首次上网日期,不代表论文的发表时间)