Flexible Low-Complexity Decoding Architecture for QC-LDPC Codes

摘要：

A novel.exible decoding architecture for quasicyclic (QC) low-density parity-check (LDPC) code is proposed in this paper to reduce decoding complexity. The novelty of this architecture lies in a new time-sharing scheme of processing units, which provides low complexity and.exible serial factor of decoding hardware. Without loss of coding performance, the architecture requires signi.cantly less processing units compared with known semi-parallel decoders at the expense of throughput decrease, while keeping memory requirement unchanged. As demonstrated by hardware and software implementation results, the proposed architecture is advisable and competent for wireless mobile systems and portable devices.

作者: Nan Jiang Kewu Peng Zhixing Yang

作者单位: State Key Laboratory on Microwave & Digital Communications Tsinghua National Laboratory for Information Science and Technology Tsinghua University,Beijing 100084,China

会议类型: 国际会议

会议名称: The 11th IEEE International Conference on Communications Systems(第11届电子和电气工程师协会国际通信系统会议)(IEEE ICCS 2008)

会议地点: 广州

会议语种:英文

在线出版日期: 2008-11-19（万方平台首次上网日期，不代表论文的发表时间）