A Broadband FFT Processor Core Based on FPGA

摘要：

This paper presents an implementation of a real-time FFT processor based on FPGA,which uses the radix-4 DIF (decimation-in-frequency) algorithm.Five stages of radix-4 butterflies are used to make up of a pipeline to compute the 1024-point complex FFT.The FFT processor can operate at 164MHz and compute a 1024-point FFT at 6.225μs when operating on the device of Xilinx Virtex II Pro 70.This will accommodate a high data throughput transmitted to the back end instrument.

作者: Sheng Li Ji Yang Sheng-Cai Shi

作者单位: Purple Mountain Observatory,Chinese Academy of Sciences2 West Beijing Road,Nanjing,210008,China;Grad Purple Mountain Observatory,Chinese Academy of Sciences 2 West Beijing Road,Nanjing,210008,China Purple Mountain Observatory,Chinese Academy of Sciences2 West Beijing Road,Nanjing,210008,China

会议类型: 国际会议

会议名称: 第八届电磁理论、天线及传播国际研讨会

会议地点: 昆明

会议语种:英文

在线出版日期: 2008-11-01（万方平台首次上网日期，不代表论文的发表时间）