System-on-Chip Design with Dataflow Architecture

摘要：

This paper presents a practical approach toimplement data flow dominated System-on-Chip systemwith real-time requirements. With data flow model and avirtual component (VC)-oriented implementationarchitecture, the approach has the advantages ofeffectively supporting design reuse or reconfiguration.Single bus architecture reduces the design complexityand implementation cost and provides an effective waysto meet real-time constraints. Based on the architecturesome important aspects such as bus arbitrating, VCframework are described, these techniques are criticalfactors for achieving design goal.

作者: Baifeng Wu Chenglian Peng

作者单位: Fudan University,Shanghai 200433,P.R.China

会议类型: 国际会议

会议名称: The 8th International Conference on Computer Supported Cooperative Work in Design(第八届计算机支持的协同工作设计国际会议)(CSCWD2004)

会议地点: 厦门

会议语种:英文

页码: 712-716

在线出版日期: 2004-05-26（万方平台首次上网日期，不代表论文的发表时间）