Design Techniques and Modeling for 60GHz Applications With a 65nm-CMOS-RF Technology
To exploit the unlicensed band at frequencies around 60GHz,a certain number of design rules is considered.This paper highlights the difficulties to design a millimeter CMOS power amplifier (PA). A model of a compact inductor and interconnect lines is detailed. This model takes into account substrate and resistive parasitic. A 65nm CMOS technology from STMicroeleetronics has been used. Innovative techniques are implemented in the design of a power amplifier (PA) which is optimized to deliver the maximum linear output power. To obtain good performances in a small surface of silicon,it has been designed,with both lumped and distributed elements. The PA delivers a linear output power of 8.9dBm with just an area of 0.48mm*0.6mm including pads.
Sofiane Aloui Eric Kerhervé Didier Belot Robert Plana
IMS laboratory,UMR CNRS 5218 University of Bordeaux 33405 Talence Cedex,France STMicroelectronics Central R&D 1 Crolles,France didier LAAS-CNRS University of Toulouse Toulouse
国际会议
2008 Global Symposium on Millimeter Waves(GSMM 2008)(2008全球毫米波学术大会)
南京
英文
241-244
2008-04-21（万方平台首次上网日期，不代表论文的发表时间）