A Multiple Bits Error Correction Method Based on Cyclic Redundancy Check Codes

摘要：

A method which links the judge and data check is provided.The method realizes the ability of multiple bits error correction using cyclic redundancy check codes.The error correction principle and realization method are described in detail.The key parameters design of the method is analyzed.The simulation results show that the multiple bits error correction method can improve the bit error rate and packet error rate effectively.

关键词： cyclic redundancy check error correction multiple bits error frame error probability

作者: Yanbin Zhang Qi Yuan

作者单位: College of Information Technology,Beijing Institute of Technology Beijing 100081,P.R.China

会议类型: 国际会议

会议名称: 9th International Conference on Signal Processing(第九届国际信号处理学术会议)(ICSP08)

会议地点: 北京

会议语种:英文

在线出版日期: 2008-10-26（万方平台首次上网日期，不代表论文的发表时间）