A VLSI-Oriented FFT Algorithm and Its Pipelined Design

摘要：

This paper presents a novel FFT algorithm based on a multidimensional index mapping method.Twiddle factor multiplications are decomposed in a divide and conquer approach to minimize the number of multipliers and remain the simpleness of the butterfly computation.And canonic signed digit representation is applied to constant multiplications introduced from the decomposition.By exploiting the symmetry of twiddle factors,the algorithm also reduces the memory requirement for twiddle factors.These characteristics make the proposed algorithm suitable for long size FFT VLSI implementation.Based on the algorithm we propose an efficient pipeline FFT architecture and implement a 1024-point FFT processor by 0.18um CMOS technology.

作者: Xin Fan

作者单位: Shanghai Jade Technologies,Shanghai,201203,China

会议类型: 国际会议

会议名称: 9th International Conference on Signal Processing(第九届国际信号处理学术会议)(ICSP08)

会议地点: 北京

会议语种:英文

在线出版日期: 2008-10-26（万方平台首次上网日期，不代表论文的发表时间）