The Chaos Synchronization Circuit Design Based on FPGA and its Realization Method in Masking Secure Communication
This paper takes Lorenz chaos equation as an example and puts forward a way to achieve chaos synchronization circuit design and its realization method in masking secure communication. Based on the study of coupled synchronization method, we achieve the Lorenz equation and coupled synchronization circuit design by DSP Builder tool. This method of design is easy to realize and put into practice. It is tested that the Lorenz output has good self-correlation and the synchronization circuit generated has good synchronization characteristics. On this basis, it is used to realize a chaos masking secure communication system based on FPGA. This research is helpful in the process of accelerating the application of chaos system in information security and secure communication field.
FPGA Lorenz System Chaos Synchronization Secure communication Test
Qun Ding Lina Ding Wenting Lv Jia Liu
Electronic Engineering Key laboratory of Heilongjiang Province, Heilongjiang University, Harbin P. O. Box 130,150080
国际会议
第四届亚太地区混沌控制与同步会议(The Fourth Asia-Pacific Workshop on Chaos Control and Synchronization)
哈尔滨
英文
99-108
2007-08-24(万方平台首次上网日期,不代表论文的发表时间)