HIPERMA: A High Performance and Reconfigurable Processor for SAR Applications
In this paper, a high performance and reconfigurable MAC Array (HIPERMA) processor is designed for Synthetic Aperture Radar (SAR) systems. HIPERMA is composed of many coarse-grained reconfigurable units and can be configured to finish the algorithms based on matrix multiplication level. The processor maintains the performance of ASIC devices and flexibility of DSP, and also has inherent advantages over FPGA in terms of delay, area and configuration time. The measurement result shows it has a peak performance up to 20,000 MMACS based on SMIC 0.18 μm sixmetal CMOS process.
Shushan Qiao Yong Hei Xinfeng Xu Bin Wu Yumei Zhou
Institute of Microelectronics of Chinese Academy of Sciences,Beijing,China
国际会议
首届亚太合成孔径雷达会议(1st Asian and Pacific Conference on Synthetic Aperture Radar Proceedings)
安徽黄山
英文
2007-11-05(万方平台首次上网日期,不代表论文的发表时间)