Design and Realization of Intermediate down-sampling For SAR Based on FPGA

摘要：

Under the condition of meeting resolution, the SAR real-time image can satisfy the demands of the processing band by pre-filter and down-sample. Due to being in a special position in the signal processor, the ranger pre-filter needs very high operating speed and quick frequency response. The pre-filter principles and the methods are analyzed in this paper and the study is focused on the realization of range downsampling using FPGA. This paper pay more attention to the range down-sampling which following the digitai orthogonal mixing. After analyzing the polyphase arithmetic, a new method of down-sampling which is implemented in FPGA is put forward in this paper. Validated by simulation, circuit operates reliability and fulfils design demand.

作者: Xianghui Kong Tao Zhang Guanjie Zhang

作者单位: Xian Electronic Engineering Research Institute,China

会议类型: 国际会议

会议名称: 首届亚太合成孔径雷达会议(1st Asian and Pacific Conference on Synthetic Aperture Radar Proceedings)

会议地点: 安徽黄山

会议语种:英文

在线出版日期: 2007-11-05（万方平台首次上网日期，不代表论文的发表时间）