Image Matching Algorithms on Embedded Vision System Using FPGA

摘要：

Field Programmable Gate Arrays (FPGAs) have been an attractive option for improving the performance of the embedded vision system. In this paper, we propose an improved method of image matching algorithms on vision system. We implement this architecture by FPGA, taking into account the techniques such as pipelining, parallel computing and distributed arithmetic. Experimental results show that our design achieve high speeds and provide low latency in vision system.

关键词： FPGA pipelining template matching distributed arithmetic real-time

作者: SHEN Xiaolin

作者单位: School of Information and Communication Engineering, North University of China, Taiyuan, 030051

会议类型: 国际会议

会议名称: 第七届国际测试技术研讨会

会议地点: 北京

会议语种:英文

在线出版日期: 2007-08-05（万方平台首次上网日期，不代表论文的发表时间）