A High-speed Image Acquisition and Storage System Based on Cameral Link

摘要：

This paper describes a high-speed image signal acquisition and storage system based on Camera Link, which uses FPGA as the main control unit. The image data collected by FPGA in 26.66 MBps is written from data buffer to FLASH, at the same time, part of the data is transmitted through UART port for the ground testing equipment to test the data. The design method of LVDS receiver, on-chip FIFO of FPGA and two-plane page program function in FLASH is also detailed in this paper.

关键词： FPGA Camera Link FLASH LVDS

作者: He Huizhu Qin Li Zhang Huixin

作者单位: Key Laboratory of Instrumentation Science & Dynamic Measurement (North University of China), Ministr National Key laboratory For Electronic Measurement Technology Department of Electronic Science and technology, North university of China, Taiyuan, 030051

会议类型: 国际会议

会议名称: 第七届国际测试技术研讨会

会议地点: 北京

会议语种:英文

在线出版日期: 2007-08-05（万方平台首次上网日期，不代表论文的发表时间）