Design of Missile-borne Solid State Recorder

摘要：

1 This paper introduces a kind of missile-borne solid state recorder (SSR). It is composed of acquisition and encoding device which used a stack structure to facilitate the further system function expansion; and storage device which used a nested structure and a reasonable buffer is designed to ensure the availability of reliable and complete flight data under high overload conditions. The recorder use FPGA as a main controller and Flash Memory for storage medium. It has a storage capacity of 128MB and can record 72 analog signals in the missile in the entire flight process. A state chart that system works is shown and its working principle and structural design is explained.

关键词： SSR Acquisition and encoding device Storage device Flash memory

作者: Liu Donghai Ren Yongfeng Li Shengkun

作者单位: Key Laboratory of Instrumentation Science & Dynamic Measurement (North University of China),Ministry of Education National Key Laboratory for Electronic Measurement Technology Department of Electronic Science and technology, North university of China, Tai

会议类型: 国际会议

会议名称: 第七届国际测试技术研讨会

会议地点: 北京

会议语种:英文

在线出版日期: 2007-08-05（万方平台首次上网日期，不代表论文的发表时间）