Study on the Damage Effects of Integrated Circuits Stressed with Different ESD Models
Three ESD models were adopted to perform an injecting damage testing on some integrated circuits, they are the standard Human-Body model (HBM), the Body-Machine (BMM) model and the Machine model (MM). The damage parameters of the devices including the average resistance between the two tested pins and the current passing through the device, the voltage and the power of the IC and the energy absorbed by the IC chip were all analyzed. Some conclusions were achieved: the relationship between the energyW absorbed by the IC chip and the discharge voltage V can be modeled as the function of B W AV = and the power on the IC follows the same rule. Under different ESD models, the failure thresholds of the IC are the same of magnitude and vary by less than a factor of two. The average resistance R between the pins which were tested and the current passing through the device I can be modeled as the function of D R CI. = . In the end, the failure mechanism of the integrated circuits were simply discussed and it could be determined that two failure modes were involved in this test.
ESD Integrated Circuit Damage Effects Model.
Chen Jingping Liu Shanghe Zhang Dawei
Institute of Electrostatic & Electromagnetic Protection, Mechanical Engineering College, Shijiazhuang Hebei 050003 China
国际会议
北京
英文
2007-08-05（万方平台首次上网日期，不代表论文的发表时间）