The Design of a PECL Interface Based on FPGA

摘要：

In high-speed acquisition, in order to increase the transmission efficiency, high stability and reduction interference, differential transmission is needed. ECL has fast 、driving ability 、low noise and more reliable stability. Using this technology the transmission rate can easily reach several hundreds MHz. This paper introduces the principles and application of the ECL advantage, uses differential pins in the FPGA to achieve the design of PECL interface circuit, analyses the problems of interface design, at the same time introduces the interface design between LVDS and LVPECL; The circuit design of different coupling is given, finally, uses experiment to validate circuit design.

关键词： ECL LVPECL LVDS

作者: YANG Ying-jun QIN Li YU Xue-yuan JIAO Xin-quan WANG Yong-shui

作者单位: National Key Laboratory for Electronic Measurement Technology Key Laboratory of Instrumentation Scie Northwest Institute of Mechanical and Electrical Engineering, Xianyang, Shaanxi, 712099, China

会议类型: 国际会议

会议名称: 第七届国际测试技术研讨会

会议地点: 北京

会议语种:英文

在线出版日期: 2007-08-05（万方平台首次上网日期，不代表论文的发表时间）