A linear voltage regulator for PLL in SOC application
In modern integrated circuit design, analog parts and digital parts are designed on a single chip. Many papers show that supply noises coupling from digital parts influence the performance of analog parts greatly. This paper presents a design to implement a linear voltage regulator with operational amplifiers for PLL in mixed signal integrated circuits, whose output voltage is proportional to bandgap reference. This circuit is designed in SMIC 0.18um CMOS process. The output voltage of the regulator can be stable when 1) power supply changes from 3.1V to 3.5V, and verse; 2) output current varies in the range from 15mA to 300uA. Its power supply noise rejection(PSNR) is less than –70dB when frequency is below 1K Hz. The current consumption of this linear voltage regulator is about 1.7mA.
OPA voltage regulator SOC bandgap reference
Chen JIA Bo QIN Zhiliang CHEN
Institute of Microelectronics Tsinghua University Beijing P.R.C
国际会议
武汉
英文
2006-09-01（万方平台首次上网日期，不代表论文的发表时间）