An Improved Digital Timing Recovery Circuit for Burst-mode Communications

摘要：

Burst-mode communication (or burst-mode transmission) has been increasingly adopted in modern wireless communication systems. It requires a digital timing recovery circuit with short acquisition time. The bang-bang phase detector is widely used in digital timing recovery circuits owing to its simple structure. However, these timing recovery circuits do not provide a quick acquisition. In this paper, an enhanced bang-bang phase detector is proposed, increasing the resolution of the timing error by over-sampling the data L times and therefore reducing the phase error variance by 1/L2 times. This timing recovery scheme can be implemented using a Direct Digital Synchronizer (DDS). Both simulation and experimental results illustrate that the new scheme has a shorter acquisition time and a longer holding time, satisfying the need of burst-mode communications.

关键词： Burst-mode communication bang-bang phase detector phase lock loop (PLL) acquisition time

作者: Changqing Liu Xingbo Guo Jian Song Changyong Pan Zhixing Yang

作者单位: Department of Electronic Engineering Tsinghua University ，Beijing,P.R.China

会议类型: 国际会议

会议名称: 第二届IEEE无线通讯、网络技术暨移动计算国际会议

会议地点: 武汉

会议语种:英文

在线出版日期: 2006-09-01（万方平台首次上网日期，不代表论文的发表时间）