A GCC-based Compiler for the Queue Register Processor (QRP-GCC)
Queue processors are a novel alternative of superscalar processors designed for the execution of highly parallel programs. The queue processor uses a first-in-first-out data structure for expression evaluation, therefore the instruction set has no register references. This research presents a new queue compiler, named QRP-GCC for a Parallel Queue Processor enhanced with a set of random access registers. QRP-GCC uses GCC infrastructure for queue program generation. GCC compiler was developed for conventional register architectures, the intermediate representation has register references and the expression evaluation is done through a depth-first pre-order traversal over the abstract syntax trees (ASTs). The queue compiler requires to make expression evaluation and code generation using breadth-first traversal over the ASTs. We also propose a new algorithm to extract maximum parallelism within basic blocks by merging expression ASTs. The QRP-GCC compiler has been successfully completed. Static evaluation of the QRP-GCC compiler is made in terms of parallelism, program size, and execution time.
optimizing compiler ILP Extraction queue processor
Arquimedes Canedo Ben Abderazek Masahiro Sowa
Graduate School of Information Systems University of Electro-Communications of Tokyo
国际会议
2006现代科技国际研讨会(The International Workshop on Modern Science and Technology in 2006)
北京
英文
250-255
2006-04-01（万方平台首次上网日期，不代表论文的发表时间）