A New and Efficient Algorithm for FPGA Routing

摘要：

In this paper, we propose a new and efficient hybrid Routing algorithm for FPGAs by integrating a Boolean satisfiability algorithm with geometric routing algorithm. It takes advantage of the rip-up-reroute capabilities of the conventional geometric routing algorithm and simultaneous net embedding characteristic of Boolean SAT-based FPGA routing. Experiment results show that compared with the corresponding pure geometric routing algorithm, the running time is dramatic reduced.

作者: Zhan LIU Zongguang YU Xiaofeng GU

作者单位: Southern Yangtze University, China

会议类型: 国际会议

会议名称: 2nd IEEE Conference on Industrial Electronics and Applications(ICIEA 2007)(第二届IEEE工业电子与应用国际会议)

会议地点: 哈尔滨

会议语种:英文

在线出版日期: 2007-05-23（万方平台首次上网日期，不代表论文的发表时间）