Built-in Self-test Scheme for IIR Digital Filter

摘要：

A built-in self-test (BIST) scheme is proposed for IIR digital filter chip. It needs no modification of the basic building cells and can detect all the non-redundant stuck-at faults in reasonable time. The testability of its cells is analyzed and the deterministic test sequence is deduced. By reusing available arithmetic function units such as adder to generate test vectors and compact test responses, this scheme can be implemented at-speed with minimum hardware overhead and performance degradation.

关键词： built-in self-test design-for-test IIR filter

作者: Yang Decai Chen Guangju Xie Yongle

作者单位: College of Automation,University of Electronic Science and Technology of China,Chengdu,610054 China

会议类型: 国际会议

会议名称: 第八届国际电子测量与仪器学术会议(Proceedings of 2007 8th International Conference on Electronic Measurement & Instruments)

会议地点: 西安

会议语种:英文

在线出版日期: 2007-08-16（万方平台首次上网日期，不代表论文的发表时间）