Research on the PWM Waveform Compensation Algorism
In this paper,dynamic PWM waveform compensation algorism is introduced in detail. The PWM waveform is generated with FPGA(field programmable gate array).The hardware is based on the Alteras FPGA-Cyclone-II EP2C8 and its configuration device-EPC2LC20. The software is developed under the Alteras development environmen qartusII 6.0 and NIOS II CPU in FPGA. In this paper,PID algorism is adopted. Simulation and experiments validate the system. The THD of the output voltage drops from 2.0% to5‰. During the adding and removal of the load, the rate of output signal fluctuation is less than 0.5% and the adjusted time is less than 2ms.
PWM wave digital power supply NIOS II FPGA-based Dynamic Waveform compensation PID algorism Realtime adjusting
Li Nianqiang Zhang Lu Wei Changzhi
School of Information science and Engineering,the University of Jinan 250022 China
国际会议
西安
英文
2007-08-16(万方平台首次上网日期,不代表论文的发表时间)