A 500MSPS 8-bit ADC Card based on Time-interleaving Technique
Time interleaving technique is a significant trend in performance enhancement for high-speed ADC systems.This paper presents an ADC card based on time-interleaving technique.The system uses two 8-bit ADCs in parallel.Each ADC can sample at 250 MHz and the total sampling speed will theoretically becomes 500 MSPS.In an approach to increase the system s performance,a calibration algorithm is developed to suppress spurs due to channel mismatches.This paper is also concerning hardware design features that give the system good performance and practicality.A VGA amplifier provides the system with programmable full scale range adjustment.Up to 1Gbit data buffering solution is applied using a high bandwidth, low cost DDR-SDRAM.And the utility of FPGA,in which LVDS receiver,DDR-SDRAM controller and PCI controller are implemented,simplifies the circuit and brings down power consumption as well as the cost.
ADC time-interleave high speed high capacity PCI card
Zhou Hao An Qi
the Key Laboratory of Physical Electronics,Hefei 230026 China
国际会议
西安
英文
2007-08-16（万方平台首次上网日期，不代表论文的发表时间）